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@@ -423,7 +423,7 @@ static uint64_t compute_fvco(uint32_t f_osc, uint8_t z, uint16_t x)
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return fvco;
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}
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-static int compute_flo(uint32_t f_osc, uint8_t z, uint16_t x, uint8_t r)
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+static uint32_t compute_flo(uint32_t f_osc, uint8_t z, uint16_t x, uint8_t r)
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{
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uint64_t fvco = compute_fvco(f_osc, z, x);
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if (fvco == 0)
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@@ -459,9 +459,9 @@ static int e4k_band_set(struct e4k_state *e4k, enum e4k_band band)
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* \param[in] fosc Clock input frequency applied to the chip (Hz)
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* \param[in] intended_flo target tuning frequency (Hz)
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* \returns actual PLL frequency, as close as possible to intended_flo,
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- * negative in case of error
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+ * 0 in case of error
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*/
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-int e4k_compute_pll_params(struct e4k_pll_params *oscp, uint32_t fosc, uint32_t intended_flo)
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+uint32_t e4k_compute_pll_params(struct e4k_pll_params *oscp, uint32_t fosc, uint32_t intended_flo)
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{
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uint32_t i;
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uint8_t r = 2;
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@@ -473,7 +473,7 @@ int e4k_compute_pll_params(struct e4k_pll_params *oscp, uint32_t fosc, uint32_t
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oscp->r_idx = 0;
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if (!is_fosc_valid(fosc))
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- return -EINVAL;
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+ return 0;
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for(i = 0; i < ARRAY_SIZE(pll_vars); ++i) {
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if(intended_flo < pll_vars[i].freq) {
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@@ -556,13 +556,13 @@ int e4k_tune_params(struct e4k_state *e4k, struct e4k_pll_params *p)
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*/
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int e4k_tune_freq(struct e4k_state *e4k, uint32_t freq)
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{
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- int rc, i;
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+ uint32_t rc;
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struct e4k_pll_params p;
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/* determine PLL parameters */
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rc = e4k_compute_pll_params(&p, e4k->vco.fosc, freq);
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- if (rc < 0)
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- return rc;
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+ if (!rc)
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+ return -EINVAL;
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/* actually tune to those parameters */
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rc = e4k_tune_params(e4k, &p);
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